Descripción
Reliability
- Development and execution of Wafer Level Reliability strategy for Technologies in Production
- Follow-up of existing Wafer Level Reliability tests and development of new WLR tests
- Work with Technology R&D and the Non-Volatile Memory Development Team on setting up relevant WLR tests for NVM
- Be a central knowledge point for Device Reliability aspects for Technologies in Production
Parametric Test
- Owner of test routines and test programs (including WLR), limit files, specifications, operating procedures and work instructions for technologies in Production
- Participation in parametric test activities for next technology nodes in close cooperation with the development team
- Test parametric pattern design/redesign
- MSA: SPC, Gage R&R analysis